Double sided flexible circuit for integrated circuit packages and method of manufacture

ABSTRACT

A double-sides electrical interconnection flexible circuit particularly useful as a substrate for an area array integrated circuit package is described. A circuit having interconnection patterns on one surface and solder ball contact pads on the second surface are interconnected by solid copper vias formed from an array of raised studs etched from a metal matrix. In reel to reel format, the etched metal matrix is adhered to one surface of the film and forms the base metal for the solder ball contact pads. The matrix with studs are presses through the dielectric film with a copper layer on the opposite surface, thereby forming an intermediate structure for a flex circuit with self-aligned solid copper vias in a one step process. The contacts are reinforced by plating both surfaces with a layer of copper, and conventional processes are used to complete the circuit patterning.

FIELD OF THE INVENTION

[0001] The present invention relates generally to flexible circuits andmore particularly to a method of fabricating flexible circuits forintegrated circuit package interconnections.

BRIEF DESCRIPTION OF RELATED ART

[0002] As the demand for cheaper, faster and lower power consumingintegrated circuits increases, so must the packing density at thecircuit board level. Not only have techniques continually evolved tomeet the demand for minimizing dimensions of the transistors and of theelectrical interconnections which integrate semiconductor devices, butalso the packaging technology has advanced resulting in smallerintegrated circuit packages with improved electrical and thermalperformance.

[0003] Ball Grid Array (BGA) and many Chip Scale Packages (CSP) areintegrated circuit packages which are assembled to an external circuitboard using an array of solder balls confined within the area of thepackage. The solder balls are electrically connected to an externalcircuit board, and the external connections to the chip are made throughconductive vias and conductor traces in the package substrate. Anexample of an area array package is shown in FIG. 1a and is compared toa leaded package illustrated in FIG. 1b. With area array packages, suchas the CSP depicted in FIG. 1a, solder balls external contacts 101eliminate the protruding leads 121 of leaded packages in FIG. 1b,thereby providing a more compact package which requires less circuitboard space. A printed circuit substrate 102 supports the die andprovides electrical interconnection between the die and external contactsolder balls. The printed circuit substrate replaces the die support pad122 and the internal lead frame 123 of leaded packages in FIG. 1b,allowing improved performance by lower inductance of the shorterinterconnection between the chip and the external circuit board. Anadditional advantage of the printed circuit substrate is achieved byincorporating multiple common power and/or ground planes into thesubstrate.

[0004] Integrated circuit chips 104 are electrically connected to theinterconnect circuitry on the substrate either by wire bonding or byflip chip 103 connections. Typical substrates are of rigid printedwiring board construction, or for more advanced small and closely spacedcircuits, an unsupported flex circuit provides interconnections.Electrical connection between the printed circuitry 105 on the chip sideof the substrate and the external contact solder balls is typicallyrealized by conductive vias 106 through the substrate.

[0005] Printed circuits are typically fabricated by preparing by anenlarged-scale artwork master of a circuit pattern and conductor paths,and then the enlarged-scale artwork master is photographically reducedto the desired size. Screens and masks are fabricated according to thereduced circuit pattern for the application of photoresist materials.Processes including etching, screening, plating, laminating, vacuumdeposition, via hole formation, and protective coating application areused to fabricated both supported printed circuits and unsupportedflexible circuits.

[0006] Substrates for area array packages on flex circuits are mostcommonly fabricated on a dielectric polymer base film in reel or sheetformat. A copper metal is applied to both surfaces of the dielectricfilm either by bonding a thin foil to the base film, or by vapordepositing the metal and subsequently plating to the necessary conductorthickness. Interconnect traces and contact pads are patterned and etchedin the metal. Several techniques are known for electricallyinterconnecting the conductors and contacts on either side of thesubstrate. Vias are typically formed by mechanical punching or by laserablation, and the vias are filled with a conductor by plating, by metaldeposition during the film metallization, or by filling with conductivepastes. Completing the fabrication of a circuit includes plating a layerof nickel and a thin film of gold over the conductors for environmentalprotection, and to support solder contacts. A solder mask coating isapplied to the circuitry on the surface to be soldered in order tocontrol the solder run out.

[0007] All of these fabrication techniques require multiple plating andetching steps. In the case of laser ablation where one via is formed ata time, the process is repetitive and time consuming. Further, theexisting techniques for making conductive vias suffer from difficultiesin making the through holes consistently conductive, and in aligning thetop and bottom circuits with the vias. Via conductivity failures occureither as electrical opens or as intermittent contacts resulting fromseparations in the thin conductor walls during thermal excursions due toexpansion mismatch between the conductor and the substrate, fromincompletely coating by vapor deposition, from air pockets entrapped inthe vias during plating from both sides of the circuit, from fatiguefailures of the thin conductors, from marginal conductivity of thefilling material, and/or from marginal contact due to misalignment ofthe circuit and vias.

[0008] It is accordingly desirable to provide a reliable flexiblecircuit substrate for integrated circuit area array packages, and amethod of manufacture that permits high volume production without thereliability issues identified for current processes, and whicheliminates the need for costly vapor deposition or multiple laserdrilling.

SUMMARY OF THE INVENTION

[0009] The principal object of the present invention is to provide areliable, double sided electrical interconnection flexible circuit whichenables interconnecting integrated circuit chips to an external circuit,and a method of manufacturing the flex circuit. The preferred embodimentof the invention provides a flexible circuit substrate for area arraypackages including conductor patterns on the first surface of a flexibledielectric film which permit interconnection between the chip terminalsand from the chip terminals to conductive vias through the dielectricfilm. It further includes, on the second surface a plurality of contactpads for attachment of solder balls for external contact to a secondlevel of interconnection, and the conductors on the two surfaces areinterconnected by reliable, solid metal conductive vias. The uniqueconductive vias comprise metal studs etched from a metal matrix,preferably comprising copper, and the studs when pressed through thedielectric film contact the conductive material on the first surface ofthe dielectric. The copper matrix with raised studs is attached to thesecond surface of the dielectric film, and the unraised portion of thematrix provides the pre-patterned solder ball contact pads.

[0010] The flex circuit of the present invention, therefore, includes aplurality of studs etched from a metal matrix with a which serve as boththe tool to punch apertures for the vias, and to simultaneously fill thevias. The unraised film portion of the metal matrix provides the basemetal which will subsequently be patterned to form the solder ballcontacts, and thus the film and the studs become a part of the finishedflex circuit.

[0011] It is further an object of the invention to provide a predecessorembossing tool for use of and inclusion into the flexible circuit, and amethod of manufacturing the tool. The embossing tool comprises a coppermatrix etched to form raised studs corresponding to a pattern ofconductive vias in a flexible circuit. The etched studs of the copperembossing tool when adhered to the base dielectric film, and a hydraulicforce applied, punch a plurality of cylindrical apertures in the film,and simultaneously fill the apertures. When pushed through thedielectric, the studs contact conductors on the opposite surface of tosolid conductive vias through the dielectric.

[0012] To complete the fabrication of the intermediate base structurefor a flex film, additional copper is electroplated onto the surfaces toboth increase the conductor thickness, and to seal the connectionbetween the solid Cu via and the copper film on the first surface,thereby insuring robust electrical contact. Subsequently, the copper onboth surfaces is photopatterned and etched to provide interconnectionsand bump solder pads. The patterns on either side are aligned to thevias, thereby eliminating the problems associated with aligning patternson opposite sides of a film.

[0013] It is further an object of the invention to provide a method forfabricating a flex circuit substrate which has high yield, low cost, andis amenable to mass production. In addition to the etched metal matrix,a die set precisely matched to the etched studs facilitates punchingapertures for vias in the film. Reel to reel processing and transportare the preferred techniques for fabrication of substrates which maythen be assembled into packages using the same format. However, theprocesses are not limited to this technique, nor is the specific flexcircuit application.

[0014] In an alternate embodiment, a metal embossing tool is coated inthe selective raised areas with a thin film of copper which undertemperature and pressure adheres to the dielectric film simultaneouslywith the embossing process. The embossing tool is removed, leavingdepressed interconnect patterns, contact pads and/or vias coated withcopper. The exposed copper is subsequently plated with copper. Theprocess eliminates patterning and etching in the manufacture of a flexcircuit, as well as the need for a solder mask on solder contactsurface.

BRIEF DESCRIPTION OF THE DRAWINGS

[0015]FIG. 1a is an example of an area array chip sized package withflex circuit substrate. (Prior art)

[0016]FIG. 1b shows an example of a leaded package with lead frame.(Prior art)

[0017]FIG. 2a is a cross sectional view of a flex circuit of the presentinvention.

[0018]FIG. 2b shows an array of solder bump contact pads and vias of thepresent invention.

[0019]FIG. 2c provides an example of contact pads from chip terminals,interconnection patterns and vias of the present invention.

[0020]FIGS. 3a-3 d are illustrations of fabrication steps for an etchedmetal matrix for subsequent flex circuit application.

[0021]FIGS. 4a-4 e illustrate the fabrication steps for forming vias ina flex circuit using an etched metal matrix.

[0022]FIGS. 5a-5 c show the plating process steps for fabricating a flexcircuit with an etched metal matrix in place.

[0023]FIG. 6 demonstrates a die tool set to facilitate aperturepunching.

[0024]FIG. 7 shows the surface of an embossing tool with thin filmcopper coating on the raised areas.

[0025]FIG. 8 shows the depressed and metallized solder ball contactpads, vias and interconnections to vias.

DETAILED DESCRIPTION OF THE INVENTION

[0026] In accordance with the preferred embodiment of the currentinvention, a double sided flexible interconnection circuit 200 for useas an integrated package substrate is shown in cross-sectional view inFIG. 2a. The flex circuit includes a base dielectric film 201 of aflexible polymer patterned on the first surface 201 a withinterconnection traces 202 from the chip terminal pads to conductivevias 203, which provide electrical contact to solder bump contact pads204 on the second surface 201 b of the dielectric film.

[0027] A typical pattern of solder ball contact pads 204 for a flexcircuit package substrate is shown in FIG. 2b. The pads 204 on thesecond surface 201 b of the dielectric film are arrayed in a patternwhich will align to and allow contact to be made by solder balls (notshown) to a printed wiring board, or other second level ofinterconnection. As shown in both FIGS. 2a and 2 b, the contact pads 204are interconnected to the conductive vias 203 by metal traces 205, orthe pads coincide with and overlap the conductive vias.

[0028]FIG. 2c provides a section of an exemplary interconnection patternon the first surface 201 a of a flex circuit. A plurality of contactpads 211 for bond wires or flip chip bumps from the chip areinterconnected by conductor traces 210 from the pads 211 to vias 203,and/or to shared traces 212 between chip contacts pads, such as for apower or ground bus with multiple contacts by the chip.

[0029] A plurality of solid metal conductive vias 203 electricallyconnect the patterned conductors on each surface of the dielectric film.The conductive vias of the preferred embodiment of the current inventioncomprise metallic studs etched from a metal matrix. The studs areattached to an unraised portion of the metal matrix on the secondsurface 201 a of the flex circuit. The metal film matrix adhered to thedielectric flex film provides the base metal of the solder ball contactpad 204. The metal matrix with etched studs comprises copper.

[0030] An etched metal stud 203 contacts the interconnection pattern 202on the first surface 201 b of the dielectric film, and is intimatelyattached to the base copper metal of the solder ball contact pad 204 onthe second surface 201 a of the dielectric film 210, thereby forming athe solid metal conductor via 203. Reliability of the copper studcontact to the conductor pattern on both surfaces of the dielectric filmis insured by a layer of plated copper 206 to fill any voids at theinterfaces.

[0031] The device of this invention has been described wherein the metalmatrix with raised studs is a portion of the solder ball pads on thesecond surface of the dielectric film. In an alternate embodiment, thesurfaces are reversed and the metal matrix with studs forms the basemetal layer of the interconnect pattern or first surface of thedielectric film, and the copper studs engage with the solder ballcontact pads on the second surface.

[0032] Interconnection circuitry on the flex circuit substrate furtherincludes a thin film of nickel and gold over the exposed copper patternsto provide environmental protection and a bondable surface. A soldermask surrounds the solder ball pads on the second surface to completethe patterned area of the flex circuit.

[0033] The preferred embodiment has been described as a flexible circuitwhich constitutes the major component and interconnection for anintegrated circuit substrate, however, it is not limited to thisapplication, but is intended to cover flexible circuits havinginterconnections on two sides.

[0034] Turning now to a method of fabricating the flex circuit of thecurrent invention having a plurality of conductive vias comprising theetched studs of a metal matrix which serve to electrically interconnectthe circuitry on the two surfaces of the flex film substrate. It isnecessary to fabricate a metal matrix having raised studs correspondingto a pattern of vias for a specified flex circuit. The matrix withraised studs constitutes the tool used to punch the apertures for vias,to fill the vias with the studs, and to provide the base metal for thesolder ball contact pads on the second surface of the dielectric film.

[0035]FIGS. 3a through 3 d illustrate cross sectional views of a theprocess steps for forming a metal matrix tool to be used subsequently tofabricate a flex circuit. A strip of a conductive metal 301, preferablycomprising copper, in the range of 0.003 to 0.006 inches in thickness iscoated with a photoresist 310 on both major surfaces, as shown in FIG.3a. A plurality of photoimaged via sites 302 are developed on the firstsurface 301 a in a conventional manner, i.e., artwork is placed over thephotoresist and the photoresist is exposed using a high intensity UVlight source. As seen in FIG. 3b, the photoimaged via sites 302 on thefirst surface 301 a are protected by photoresist 310 and the exposedmetal is partially etched in FIG. 3c using a commercially availableammoniacal copper etchant. The photoresist is then removed using acommercially available stripping solution, leaving a copper film 311with a plurality of etched studs 315, as shown in FIG. 3d wherein thetransverse studs 315 correspond to the via pattern for a flex circuitsubstrate. The metal matrix after etching is in the range of 0.00075 to0.0015 inches thick in the etched areas 311 and in the range of 0.003 to0.006 inches in the protected areas. The raised, unetched areas of metalare used as studs 315 in the flex circuit fabrication. Height of thestuds will be selected as a function of the thickness of the flexcircuit substrate; i.e., the studs must be of sufficient height tocompletely pierce the flex film.

[0036] A reverse image of the photomask for the embossing tool is usedto fabricate a die plate precisely matched to the vias. The die plateprovides an opening through which residue from the punching operationwill be extruded; this will be discussed later under the subject ofmechanization.

[0037]FIGS. 4a through 4 d illustrate the steps to form solid vias for aflex circuit using the etched metal matrix 305 fabricated in FIGS. 3athrough 3 d. In FIG. 4a, a commercially available dielectric film 402,such as a polyimide polymer in the range of 0.003 to 0.006 inches thickhaving an unpatterned copper layer 403 attached to first surface 404 isthe base material for a flex circuit of the current invention. Thecopper layer is in the range of 0.0005 to 0.0015 inches thickness. Thesecond major surface 406 of the dielectric film is cleaned, and with aheat activated adhesive material 416.

[0038] In FIG. 4b, the copper matrix 311 with etched studs 315 ispositioned on the adhesive coated second surface 406 of the dielectricfilm 402. The copper film matrix and studs are selected so that theheight of the studs 315 are equal to, or greater than the thickness ofthe dilectric film 402 with associated copper film 403.

[0039] In FIG. 4c, the assemblage from FIG. 4b is positioned in ahydraulic press and pressure as indicated by arrows 420 is applied tosaid assemblage, whereby the solid copper studs 315 force a plurality ofcylindrical apertures in the dielectric film 402 and associated copperlayer 403. The material extruded from the film by the studs isrepresented as compressed dielectric layer 402 b and copper 403 b.

[0040] The apertures are filled by the copper studs 315 simultaneouslywith the punching to forming a plurality of solid copper vias in thedielectric film 402. Within the same process, the copper matrix film 311contacts the adhesive material 416 on the second surface 406 of thedielectric film. In FIG. 4d, the assemblage is passed through a heatedpress to insure adhesion of the copper matrix 311 to the adhesive 416coated second surface 406 of the dielectric film.

[0041] The vertical surfaces of the copper studs 315 of the studsopposite the film matrix 311 terminate in contact with the copper layer403 on the first surface of the dielectric. The copper stud 315 and thecopper layer 403 are press fit forming an intact solid copper layer 408on the second surface of the flex film.

[0042] In FIG. 5a the flex film 402 with copper layer 408 and the coppermatrix film 403 on one surface, and copper matrix 311 on the oppositesurface are passed through a copper electroplating step wherein a thinfilm of plated copper 509 is deposited over the exposed copper layers.The plated copper 509 insures a reliable layer of copper and fills anydefects from processing or mating of layers. Conventional electroplatingprocesses of cleaning, surface activation, plating, rinsing and dryingare used to plate the copper layers 509 on the existing copper layers.These steps have formed an intermediate base structure for a flexcircuit, having solid metal vias attached to a copper layer on bothsurfaces.

[0043] The process steps illustrated in FIGS. 4a through 4 d result in acopper clad flexible dielectric film including a plurality of solidmetal filled conductive vias in an array corresponding to the viaconductor paths through a circuit pattern for an integrated circuitpackage for ball grid array or chip scale package substrate. Theadditional copper plated layer 509 insures a uniform, void free coppersurfaces. The simple, one step punch and fill vias from an etched metalmatrix replaces the costly, multistep laser ablation, cleaning, metalvapor deposition and plating filling of exiting technology, and furtherresults in a robust self-aligned connection between the conductorsurfaces.

[0044]FIGS. 5b through 5 d illustrate the near conventional steps tocomplete fabrication of a flex circuit substrate using the dielectricfilm 402 with copper layers 408/509 on the first surface and layers311/509 on the second surface, and with conductive vias 315 as producedin FIGS. 4a through 4 d. In FIG. 5b, conventional processes are used tolaminate a photosensitive film 515 to the first surface of the viafilled film, and a circuit interconnection photomask is aligned to thevias, and exposed by a strong UV light source. A second photoresistlayer 516 is laminated to the second surface, a photo pattern for thesolder ball contact pads is aligned to the vias, and exposed. Thephotoresist patterns on both sides are developed and the exposed copperfilms are etched to form the substrate patterns as demonstrated in FIG.5c using the patterned photoresist to protect the copper of the circuitpattern 502, the solder ball pads 504 and the underlying vias 315 duringcopper etching.

[0045] The photoresist is removed by conventional stripping methods andin FIG. 5d, the metal patterned surfaces are plated first with nickel512 and with gold 513 to protect against environmental and chemicalattack. A solder mask 514 is applied to the solder ball contact padsurface surrounding each of the metal pads.

[0046] Processes and material required for completing the metallizationoverlying the patterned copper circuits are typical of those used forflex circuit formation, except that alignment of the patterns isspecifically to filled vias, as opposed to some existing technologywherein the surfaces are patterned and subsequently vias formed whichmust align to and connect the patterns on both surfaces.

[0047] Mechanization for fabricating a flexible circuit for use as anintegrated circuit area array package substrate is well adapted to reelto reel film transport. The appropriate film width will be selected forsingle or multiple packages, as required by the end user transportequipment. Continuous processing to form an intermediate structure for aflex circuit includes the following steps: alignment of a metal matrixhaving etched studs to a dielectric film, and to a die plate havingapertures specifically matched to the vias, compressing the matrix andfilm, heating to adhere the matrix to a heat sensitive adhesive andplating the copper coated structure. Further, continuous processing topattern the circuit includes the steps of photolithography, copperetching, and electroless plating the patterns.

[0048]FIG. 6 provides a schematic of an assemblage wherein a die plate610 precisely matched to the studs 315 is positioned atop a second dieplate 620 having larger openings, and constructed from a stiffermaterial to withstand repeated application of pressure. The toolingassemblage is housed inside a hydraulic press. The dielectric film withcopper studs and surfaces is positioned atop the die press, studs 315aligned to the first die plate 610 and pressure applied. As pressure isapplied, apertures in the dielectric film 402 and copper layer 403 arepunched by the embossed studs 315, through the openings in the dieplate, while the film structure is supported by the die plates 610 and620. The residue from the formation of apertures in the film is ejectedthrough the larger openings at points 621.

[0049] The film with assembled metal matrix is subsequently transportedto a position in the press having a solid plate wherein the filmassemblage is heated and compressed, which enables the copper studs tobe press fit against the copper film on the second surface and againstthe walls of the dielectric film, as shown in FIG. 4d. Reel to reelmechanization facilitates photolithography, etching and platingprocesses as required for the flex circuit production.

[0050] An alternate technique for fabricating the conductor patterns andvias of a flex circuit package substrate using an embossing toolincludes the following steps. Securing a metal matrix with embossedstuds and/or conductor patterns fabricated from known technology such aselectroforming or etching, coating the raised areas with a loosely heldthin film of copper, transferring the copper film to a dielectric filmusing heat and pressure, physically removing the matrix, andsubsequently plating the appropriate thickness of copper over the thinfilm of copper. The process is repeated on the second surface having apattern of solder ball contact pads aligned to the preformed vias. Theembossed film is plating with copper from both sides, using thetransferred metal as the seed layer.

[0051] Schematic drawings of the tools for side one is given in FIG. 7.In FIG. 7, raised areas for the conductor pattern 701, the via punches702 and pad sites 703 are coated with a thin layer of copper. The basematerial 700 of the embossing tool is a metallic film. In similarmanner, an embossing tool for the second side of the flex circuitincludes raised the solder ball contact pads, interconnections to viasand vias coated with a thin film of copper.

[0052] The copper film is selectively applied to raised portions 701,702, and 703 of the tool from a copper powder in suspension adhering tothermoplastic adhesive on the tool, or by use of an embossing toolcomprising iron, permanently masking the area where no copper is desiredand plating a film of copper on the raised portions.

[0053]FIG. 8 depicts the dielectric second surface of the flex circuit800 with depressed solder ball contact pads 804 and interconnections 805to some vias 806 resulting from embossing the dielectric film, coatingthe recesses with a thin film of loosely held copper, and subsequentlyplating copper onto the “seed copper. The dielectric serves the purposeof a solder mask between the contact pads and eliminates the need forthis material.

[0054] Similar mechanization facilitates the embossing process for thistransfer method as the preferred embodiment described earlier; i.e. reelto reel processing with heated press to effect the embossing procedure.

[0055] Advantages of the emboss and transfer method are that no etchingor photolithography are required in the flex circuit process itself andthat the conductor and contact pads are recessed into the dielectricfilm.

[0056] While the invention has been described in connection withpreferred embodiments, it is not intended to limit the scope to aparticular form set forth, but on the contrary, it is intended to coveralternatives, modifications and equivalents as may be included withinthe spirit of the invention and the scope of the invention as defined bythe appended claims.

What is claimed is:
 1. A double sided electrical interconnectionflexible circuit, to enable interconnecting an integrated circuit chipto an external circuit, including: a base dielectric film of a flexiblepolymeric material, a conductor pattern on the first surface ofdielectric film having a plurality of contact pads for interconnectionfrom the chip terminals, interconnection between said pads, and fromsaid pads to conductive vias through the film, a plurality of solderball contact pads on the second surface of the dielectric film patternedfrom an etched metal film matrix, and a plurality of conductive vias,comprising metal studs etched from said metal matrix, which interconnectthe conductors on the first surface to those on the second surface ofsaid dielectric film.
 2. The flexible circuit as described in claim 1 inwherein the metal matrix with etched studs comprise copper.
 3. Theflexible circuit as described in claim 1 wherein the etched studseverted from the metal matrix constitute a tool for punching a patternof apertures corresponding to conductive vias in the dielectric film. 4.The flexible circuit as described in claim 1 which provides theinterconnection circuitry for the substrate of an area array integratedcircuit package.
 5. The flexible circuit as described in claim 1 furtherincluding a plated copper layer disposed over the interconnect patternsand solder ball contact pads.
 6. A flexible circuit as described inclaim 5 which further including a plated layer of nickel and of goldover the conductor patterns and solder ball contact pads.
 7. A flexiblecircuit as described in claim 1 further including a plurality ofopenings parallel to the film edges which correspond to a sprockettransport mechanism.
 8. A flexible circuit as described in claim 1wherein said base dielectric film comprises a polyimide polymer in therange of 0.003 to 0.006 inches thick.
 9. A double sided electricalinterconnection flexible circuit substrate for an area array integratedcircuit package to enable interconnecting an integrated circuit chip toan external circuit including: a base dielectric film of a flexiblepolymeric material in the range of 0.003 to 0.006 inches thick, aconductor pattern comprising copper on the first surface of dielectricfilm having a plurality of contact pads for interconnection from thechip terminals, interconnection between said pads, and from said pads toconductive vias through the film, a plurality of solder ball contactpads on the second surface of the dielectric film patterned from anetched metal matrix, a plurality of solid conductive vias filled withmetal studs comprising copper, etched from said metal matrix whichinterconnect the conductors on the first surface to those on the secondsurface of said dielectric film, and which constitute a tool forpunching apertures in a pattern of conductive vias, and a layer ofplated copper disposed over said interconnect patterns and solder ballcontacts, and a layer of nickel and gold over the plated copper.
 10. Ametal matrix embossing tool, comprising a copper film having a pluralityof transverse studs.
 11. A device as in claim 10 whereby said studs arepunch tools for forming apertures in a dielectric film.
 12. A device asin claim 11 whereby said studs are equal to or slightly greater inheight than the dielectric film for a flexible circuit.
 13. A device asin claim 12 whereby each stud on the embossing tool is adapted tosimultaneously punch and fill the vias.
 14. A device as in claim 10wherein the unraised portion of the matrix adhered to the dielectricfilm and attached to the studs constitutes the base metal of a pluralityof solder ball contact pads for a flexible circuit.
 15. A method ofmanufacturing the metal matrix embossing tool as described in claim 12including the steps of: a. laminating a photoresist on each majorsurface of a metal matrix, comprising copper in the range of 0.003 to0.006 inches thick, b. aligning a photomask pattern corresponding toconductive vias in a flexible circuit to the first surface, exposingboth surfaces with a strong uv lamp, and developing the unexposedresist, c. etching the exposed copper to a thickness of about 0.0005 to0.0015 inches in the etched area.
 16. A method of manufacturing anintermediate base structure for a flex circuit including the steps of:a. forming a plurality of apertures corresponding to a pattern ofconductive vias in a flexible base polymer film having a layer of copperon the first surface by mating a metal matrix embossing tool asdescribed in claim 10 to the second surface, b. applying a force to saidmetal matrix so that the studs of the tool punch through the coppercoated polymer film, thereby creating a plurality of vias filled withthe studs, and attaching the film matrix to the second side of the flexfilm, c. electroplating a thin film of copper onto both sides of thecopper clad flex film.
 17. A die plate mechanism, to facilitate punchingapertures in a flex circuit film using studs etched from a metal matrix,including a relatively thin metal plate in the range of 0.004 to 0.010inches thick having apertures precisely matched to said studs, and arelatively thick plate having larger apertures.
 18. A method ofmanufacturing a flex circuit on a flexible base polymer including thesteps of: a. superimposing an embossing tool having a pattern ofconductors and vias corresponding to a circuit design, wherein saidraised areas are coated with a thin layer of metal, comprising copper,b. applying heat and pressure to simultaneously emboss the film and totransfer said thin metal layer from the embossing tool to the dielectricfilm, b. removing the embossing tool, c. embossing a patterncorresponding to that of the second surface of a flex circuit, andsimultaneously transferring a thin layer of metal into the embossedpattern, d. physically removing the embossing tool, e. plating a layerof copper to fill the vias and conductor patterns on both sides of thefilm, and f. plating a layer of nickel and gold onto the exposed copperpatterns. g. applying a solder mask on the surface of the filmsurrounding the solder ball contact pads.
 19. A method of making anembossing tool as in claim 18 wherein a thin layer of loosely heldcopper is selectively coated onto the raised areas of said tool bytreating the raised areas with a thermoplastic adhesive and exposing toa suspension of copper powder.
 20. An embossing tool, as in claim 18wherein a thin layer of loosely held copper is selectively plated ontothe raised areas of said tool.